Design of secure hardware architectures for neural networks

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dc.contributor.authorShrivastava, Nivedita
dc.date.accessioned2025-12-11T09:41:29Z
dc.date.issued2025-07-23
dc.identifier.urihttps://ir.iitd.ac.in/handle/123456789/7893
dc.language.isoen
dc.publisherIIT Delhi
dc.subjectArchitecture
dc.subjectRemapRemapping ping
dc.subjectHalo Pixels
dc.subjectOutsourcing
dc.subjectObfuscation
dc.titleDesign of secure hardware architectures for neural networks
dc.typeThesis

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