Modeling dynamic allocations and deallocations of local memory for translation validation

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dc.contributor.authorRose, Abhishek
dc.date.accessioned2025-11-14T10:56:39Z
dc.date.issued2025-04-03
dc.identifier.urihttps://ir.iitd.ac.in/handle/123456789/7668
dc.language.isoen
dc.publisherIIT Delhi
dc.subjectTranslation validation
dc.subjectDynamic allocation constructs
dc.subjectBlackbox modeling
dc.subjectWhitebox modeling
dc.subjectTransition graph representation
dc.titleModeling dynamic allocations and deallocations of local memory for translation validation
dc.typeThesis

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